For More Information, Contact:

Jean LeMoin (MCA)
Phone: (650) 968-8900
Email: jlemoin@mcapr.com

FOR IMMEDIATE RELEASE

SUNNYVALE, Calif. - June 4, 2001 - A group of leading companies from throughout the semiconductor industry today announced the launch of a five-year initiative aimed at accelerating the availability and fabrication of the X Architecture, a radical, new interconnect architecture based on the pervasive use of diagonal routing. Dubbed the X Initiative, this consortium of leaders in intellectual property (IP), electronic design automation (EDA), integrated circuit (IC) design services, photomask production, and semiconductor equipment and manufacturing will pursue a three-pronged mission: provide an independent source of education about the X Architecture, facilitate support and fabrication of the X Architecture through the semiconductor industry supply chain, and survey usage of the X Architecture to track its adoption.

The X Architecture, the first production-worthy approach to the pervasive use of diagonal interconnect, reduces the total interconnect, or wiring, on a chip by more than 20 percent. Based on initial evaluations, this wire-length reduction is expected to deliver simultaneous improvements of 10+ percent greater chip performance, 20+ percent less power dissipation, and 30+ percent more chips per wafer for complex, multiple-metal-layer ICs such as systems-on-chip (SoCs). For the past 20 years, chip design has been primarily based on the de facto industry standard "Manhattan" architecture, named for its right-angle interconnects resembling a city-street grid. The X Architecture rotates the primary direction of the interconnect in the fourth and fifth metal layers by 45 degrees from a Manhattan architecture. The new architecture maintains compatibility with existing cell libraries, memory cells, compilers and IP cores, by preserving the Manhattan geometry of metal layers one through three.

Charter members of the X Initiative include Dai Nippon Printing; DuPont Photomasks, Inc.; Etec Systems, Inc., an Applied Materials, Inc. company; KLA-Tencor Corporation; Numerical Technologies, Inc.; PDF Solutions, Inc.; Simplex Solutions, Inc.; Tensilica, Inc.; Toshiba Machine Co., Ltd.; Toshiba Corporation; and Virtual Silicon Technology, Inc. Membership is open to all companies throughout the semiconductor supply chain. The Initiative's first public meeting will be held on June 19, 2001, from 7:30-9:00 a.m. PDT in Room N225 of the Las Vegas Convention Center in Las Vegas, Nev., during the Design Automation Conference.

In a separate announcement today*, Simplex Solutions, Inc. and Toshiba Corporation announced their collaboration on the X Architecture. "As we developed the technology that enables the X Architecture, we worked closely with our partner, Toshiba, over several years to prove the manufacturability of this new architecture," said Aki Fujimura, president and chief operating officer of Simplex and member of the Initiative's steering group. "We look forward to working with the members of the X Initiative to revolutionize chip design with the X Architecture."

"Dai Nippon Printing is pleased to support the X initiative and any of our mask customers that adopt the X Architecture," said Naoto Mori, sales manager for Dai Nippon Printing's Mask Division. "Our mask production methodology for X Architecture designs is identical to that for current designs, so we can support X Architecture customers today."

Howard Neff, group vice president and general manager of Etec Systems, Inc., an Applied Materials company and the leading supplier of mask making equipment, said, "Etec's raster-scanning solutions are exceptionally compatible with X Architecture chip technology. Using our mask pattern generation systems, customers can immediately transition to X Architecture and achieve the same manufacturing productivity without changing their existing processes or equipment. Through our participation in the X Initiative, Applied Materials demonstrates its commitment to support our customers in the development of this innovative interconnect technology."

"Our vision for the next generation of reticle inspection equipment encompasses the requirements of the X Architecture," stated Lance Glasser, vice president and general manager of the RAPID Division of KLA-Tencor Corporation. "Joining our customers in the X Initiative will accelerate the availability of fully-inspected photomasks for X Architecture chips."

"We believe that the X Architecture has the potential to be a ground-breaking technology for 0.13 micron and below," stated Atul Sharan, senior vice president of marketing and business development of Numerical Technologies. "With our established subwavelength design-to-silicon infrastructure, Numerical is well positioned to enable support for X Architecture manufacturing and data flow requirements throughout the semiconductor supply chain."

"The X Architecture's definition enables users of Virtual Silicon's embedded SoC components to take immediate advantage of this breakthrough technology," stated Taylor Scanlon, chief executive officer of Virtual Silicon Technology, Inc. "The simultaneous benefits of improved density, lower power and increased performance of the X Architecture will appeal to both our fabless SoC customers and our manufacturing partners."

In addition to Simplex's Fujimura, the X Initiative steering group comprises Ken Rygler, executive vice president of worldwide marketing and strategic planning, DuPont Photomasks; R.L. Smith, director, strategic marketing, Etec Systems; Michael Sanie, director of marketing and business development, Numerical Technologies; Jan Willis, vice president of business development, Simplex Solutions; Chris Rowen, CEO, Tensilica; Dr. Takashi Mitsuhashi, chief specialist in the System LSI Design Division, Toshiba Corporation; and Mahesh Tirupattur, vice president of business development, Virtual Silicon Technology. Serving in an advisory role to the X Initiative steering group are Debbie Scoggin, vice president of marketing, Fabless Semiconductor Association; Dr. Resve Saleh, NSERC/PMC-Sierra Chair Professor, University of British Columbia; and Dr. Kenji Yoshida, vice president of engineering, Semiconductor Technology Academic Research Center (STARC, Tokyo, Japan).

"In today's era of five-plus metal-layer designs, the advantages of using diagonal lines are tremendous in terms of chip performance, as well as area," stated Dr. Kenji Yoshida, vice president of engineering, Semiconductor Technology Academic Research Center (STARC, Tokyo, Japan). "The industry should take advantage of this opportunity. I believe the X Initiative's effort is the right approach."

Cautionary Note Regarding Forward-looking Statements
This release contains forward-looking statements (including, without limitation, information regarding semiconductor design, production and performance improvements resulting from the X Architecture, the compatibility of the X Architecture with current technology, the future success of X Architecture technology, the X Initiative members' long-term plans to collaborate to accelerate the availability and fabrication of the X Architecture and the ability of certain of the X Initiative members' to support the X Architecture) that involve risks and uncertainties that could cause the results of X Initiative members and other events to differ materially from managements' current expectations.

Actual results and events may differ materially due to a number of factors including, among others: future strategic decisions made by the X Initiative members; failure of the X Architecture to enable the production of designs that are feasible and are competitive with current designs or future alternatives; the viability of Simplex's interconnect technology and other Simplex intellectual property that enables the X Architecture; the ability of Simplex to engage the partners necessary to complete the development of the X Architecture; future strategic decisions made by Toshiba and/or other partners that inhibit the development of the X Architecture; demand for advanced semiconductors that are developed using the X Architecture; cost feasibility of the production of semiconductors designed using the X Architecture; and the rapid pace of technological change in the semiconductor industry. The matters discussed in this press release also involve risks and uncertainties described in the most recent filings of the X Initiative members with the Securities and Exchange Commission. The X Initiative members assume no obligation to update the forward-looking information contained in this release.

* See "Simplex and Toshiba Change the Face of Chip Design by Enabling Revolutionary IC Architecture."